Saturday, 1 June 2013

8051: Memory Organization


keywords: 8051, Embedded System

Memory Organization:

Program Memory (ROM) is used to permanently save the program being executed, while Data Memory (RAM) is used for temporarily storing data and intermediate results created and used during the operation of the microcontroller.

Program Memory (ROM):


Program memory is the memory that holds the actual 8051 program that is to be run. This memory is limited to 64K and comes in many shapes and sizes: Code memory may be found on-chip, either burned into the microcontroller as ROM or EPROM. Code may also be stored completely off-chip in an external ROM or, more commonly, an external EPROM. Flash RAM is also another popular method of storing a program. Various combinations of these memory types may also be used--that is to say, it is possible to have 4K of code memory on-chip and 64k of code memory off-chip in an EPROM.
When the program is stored on-chip the 64K maximum is often reduced to 4k, 8k, or 16k. This varies depending on the version of the chip that is being used. Each version offers specific capabilities and one of the distinguishing factors from chip to chip is how much ROM/EPROM space the chip has.
However, code memory is most commonly implemented as off-chip EPROM. This is especially true in low-cost development systems and in systems developed by students.
By default, the External Access (EA) pin should be connected VCC so that instructions are fetched from internal memory initially. When the limit of internal memory (4K) is crossed, control will automatically move to external memory to fetch remaining instructions. If designer wants to fetch instruction from external memory only, then he must connect EA pin to ground (GND).
Programming Tip: Since code memory is restricted to 64K, 8051 programs are limited to 64K. Some assemblers and compilers offer ways to get around this limit when used with specially wired hardware. However, without such special compilers and hardware, programs are limited to 64K.

Data Memory:


There are 128 bytes of RAM in the 8051. The 128 bytes are divided into three groups i.e. General Purpose Register (32 bytes), Bit Addressable Area (16 bytes) and Scratch Pad Area (80 bytes). Data Memory is used for temporarily storing data and intermediate results created and used during the operation of the microcontroller.
Let us see the complete memory map of internal RAM...
The lowest 32 bytes are grouped into 4 banks of 8 registers each and each register is of 8 bits. These registers are named as R0- R7. Two bits in the Program Status Word (PSW) select which register bank is in use. If Bank 1 is selected than registers 08H to registers 0FH will be named as R0 to R7, similarly If Bank 3 is selected than registers 18H to registers 1FH will be named as R0 to R7. Default register bank is Bank0. This architecture allows more efficient use of code space, since register instructions are shorter than instructions that use direct addressing.
The next 16 bytes above the register banks form a block of bit-addressable memory space. The microcontroller instruction set includes a wide selection of single-bit instructions, and these instructions can directly address the 128 bits in this area. These bit addresses are 00H through 7FH.All the registers above 30H are simple registers and nothing is associated with them accept that this area can be used as scratch pad area.
The 8051 also contains 128 Bytes of memory area assigned to SFRs (Special Function Registers); address range is 80H to FFH.

Special Function Registers:


  
Program Status Word Register (PSW):

The program status word (PSW) register is an 8-bit register. It is also referred to as the flag register. Although the PSW register is 8 bits wide, only 6 bits of it are used by the 8051. The two unused bits are user-definable flags. Four of the flags are called conditional flags, meaning that they indicate some conditions that result after an instruction is executed. These four are CY (carry), AC (auxiliary carry), P (parity), and OV (overflow).
        PSW.7     PSW.6     PSW.5       PSW.4     PSW.3      PSW.2      PSW.1    PSW.0
CY
AC
F0
RS1
RS0
OV
-
P

CY          PSW.7                    Carry Flag
AC          PSW.6                    Auxiliary Carry Flag
F0           PSW.5                    Available to the User for General Purpose
RS1         PSW.4                    Register Bank Selector Bit1
RS0         PSW.3                    Register Bank Selector Bit0
OV          PSW.2                    Overflow Flag
-                 PSW.1                    User-Defined Bit
P              PSW.0                    Parity Flag
  
As seen from Figure the bits PSW.3 and PSW.4 are designated as RS0 and RS1, respectively, and are used to change the bank registers.
The bit format of PSW is shown as following:
RS1         RS0         Bank Selected
   0            0             Bank0
   0            1             Bank1
   1            0             Bank2
   1            1             Bank3

Carry Flag: This flag is set whenever there is a carry out from the D7 bit. This flag bit is affected after an 8-bit addition or subtraction. It can also be set to 1 or 0 directly by an instruction such as “SETB C” and “CLR C” where “SETB C” stands for “set bit carry” and “CLR C” for “clear carry”.

Auxiliary Carry Flag: If there is a carry from D3 to D4 during an ADD or SUB operation, this bit is set; otherwise, it is cleared. This flag is used by instructions that perform BCD (binary coded decimal) arithmetic.

Parity Flag: The parity flag reflects the number of 1’s in the A (accumulator) register only. If the A register contains an odd number of 1’s, then P = 1. Therefore, P = 0 if A has an even number of 1’s.

Overflow Flag: This flag is set whenever the result of a signed number operation is too large, causing the high-order bit to overflow into the sign bit. In general, the carry flag is used to detect errors in unsigned arithmetic operations.

Accumulators: Accumulator register is a general-purpose register used for storing intermediate results obtained during operation. Prior to executing an instruction upon any number or operand it is necessary to store it in the accumulator first. All results obtained from arithmetical operations performed by the ALU are stored in the accumulator. Data to be moved from one register to another must go through the accumulator.
ACC.7
ACC.6
ACC.5
ACC.4
ACC.3
ACC.2
ACC.1
ACC.0
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit0
Position

B- Register: Multiplication and division can be performed only upon numbers stored in the A and B registers. All other instructions in the program can use this register as a spare accumulator (A).
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit0
Position

SP (Stack Pointer):

This SFR indicates where the next value to be taken from the stack will be read from in Internal RAM. If you push a value onto the stack, the value will be written to the address of SP + 1. That is to say, if SP holds the value 07h, a PUSH instruction will push the value onto the stack at address 08h. This SFR is modified by all instructions, which modify the stack, such as PUSH. POP, and LCALL, RET, RETI, and whenever interrupts are provoked by the micro controller.
The SP SFR, on startup, is initialized to 07h. This means the stack will start at 08h and start expanding upward in internal RAM. Since altering register banks 1, 2, and 3 as well as the user bit variables occupy internal RAM from addresses 08h through 2Fh, it is necessary to initialize SP in your program to some other value if you will be using the alternate register banks and/or bit memory, It is better to use the default selling of stack pointer and use Bank 0, in this case the stack will be manipulated in registers above the 08H memory address.

Data Pointer (DPTR):

The SFRs DPL and DPH work together to represent a 16- bit value called the Data Pointer (DPTR). The data pointer is used in operations regarding 'external RAM and some instructions involving code memory. Since it is an unsigned two-byte integer value, it can represent values from 0000H to FFFFH. In reality, you almost always have to deal with DPTR one byte at a time. For example, to push DPTR onto the stack you must first push DPL and then DPH. You can't simply push DPTR onto the stack. Additionally, there is an instruction to "increment DPTR." When you execute this instruction, the two bytes are operated upon as a 16-bit value. However, there is no instruction those decrements DPTR. If you wish to decrement the value of DPTR, you must write your own Code to do so.


 keywords: 8051, Embedded System

 

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