First program using VHDL

Keyword: VHDL

First Program using VHDL

VHDL code of 2-input AND gate using Data Flow

Library IEEE;                                         library part

Entity abc is

          Port (a: in bit;                             Entity part

                  b: in bit;

                         c: out bit);

end abc;                        -- Comment (only single line comment is possible)

architecture xyz of abc is

begin                                                                          

c<= a and b;                                Architecture part

end xyz;

Note: Here "abc" is the entity name and "xyz" is the architecture name. (entity name and architecture name may or may not be the same)