Addressing Modes & Interrupts - 8085

Addressing Modes: 

To perform any operation, we have to give the corresponding instructions to the microprocessor. In each instruction, programmer has to specify 3 things: 

• Operation to be performed 
• Address of source 
• Address of destination.

The method by which the address of source of data or the address of destination of result is given in the instruction is called Addressing Modes.The term addressing mode refers to the way in which the operand of the instruction is specified.

The instructions MOV A, B or MVI A, 10H are to copy data from a source into a destination. In these instructions the source can be a register, an input port, or an 8-bit number (00H to FFH). Similarly, a destination can be a register or an output port. The sources and destination are operands. The various formats for specifying operands are called the ADDRESSING MODES. 

For 8085, they are: 
1. Immediate addressing.

2. Register addressing.

3. Direct addressing.

4. Indirect addressing.

5. Implied Addressing.

Immediate addressing: Data is present in the instruction. Load the immediate data to the destination provided. 

MVI A, 10H (10H is copied into the register A)

MVI B, 34H (34H is copied into the register B).

Register addressing: In this mode, the operand is in general purpose registers.

MOV B, A (the content of A is copied into the register B)

         MOV A, C (the content of C is copied into the register A).

Direct addressing: In this mode, the address of the operand is given in the instruction itself.

LDA 2500H (Load the contents of memory location 2500 H in Acc.)

Indirect Addressing: In this mode, the address of operand is specified by a register pair.

MOV A, M   (move data from memory location specified by H-L pair to

                  Accumulator).

Implied Addressing Mode: This mode doesn't require any operand. The data is specified by OPCODE itself. If address of source of data as well as address of destination of result is fixed, then there is no need to give any operand along with the instruction.

CMA          (Complement accumulator)

 

Interrupts in 8085: 

Interrupt is a mechanism by which an I/O or an instruction can suspend the normal execution of processor and get itself serviced. Generally, a particular task is assigned to that interrupt signal. In the microprocessor based system the interrupts are used for data transfer between the peripheral devices and the microprocessor. The processor will check the interrupts always at the 2nd T-state of last machine cycle.

Process of interrupt:

Step 1: Let’s take a real example and relate it with microprocessor operation. You are seating on a chair read a book which you like similarly in microprocessor let processor doing program of arrange ascending order of 100 number.

Step2: Now you heard the mobile ring / in microprocessor now let it got request of interrupt means it get INTR (Interrupt Request) signal.

Step 3: You pick-up the phone and say hello / in microprocessor send acknowledgement of getting interrupt request to send INTA (Interrupt Acknowledgement).

Step 4: You heard that your father told you open the main door / in microprocessor you got the ISR (Interrupt service routine where the order of new work is written).

Step 5: Now you put a page pointer between the pages which you read / in microprocessor it store the address of current running program, where it interrupted, in stack pointer.

Step 6: Now you go there and open the main door and return back to your chair and start reading the story book from where you put the page pointer / in microprocessor now it process the ISR and after completion of work microprocessor pull the stored address of main programmed from stack and execute again. 

Interrupt Service Routine (ISR): A small program or a routine that when executed services the corresponding interrupting source is called as an ISR.

There are 6 pins available in 8085 for interrupt:

1. TRAP

2. RST 7.5

3. RST6.5

4. RST5.5

5. INTR

6. INTA

Types of interrupt:

Vector Interrupt: In this type of interrupt, Processor knows the address of Interrupt. In other word processor knows the address of interrupt service routine.

The examples of vector interrupt are RST 7.5, RST 6.5, RST 5.5, and TRAP.

Non-Vector Interrupt: In this type of interrupt, Processor cannot know the address of Interrupt. It should give externally. In the device will have to send the address of interrupt service routine to processor for performing Interrupt. The example of Non-vector interrupt is INTR.

Maskable interrupts: An interrupt which can be disabled by software that means we can disable the interrupt by sending appropriate instruction, is called a maskable interrupt. RST 7.5, RST 6.5, RST 5.5 are the example of Maskable Interrupt.

Non-Maskable interrupts: As name suggests we cannot disable the interrupt by sending any instruction is called Non Maskable Interrupt. TRAP interrupt is the non-maskable interrupt for 8085. It means that if an interrupt comes via TRAP, 8085 will have to recognize the interrupt we cannot mask it.

There are two types of interrupts used in 8085 Microprocessor:

1.     Hardware Interrupts

2.     Software Interrupts

Software Interrupts: 

 

A software interrupts is a particular instructions that can be inserted into the desired location in the program. There are eight Software interrupts in 8085 Microprocessor. 

 

1. RST0 

2. RST1

3. RST2

4. RST3

5. RST4

6. RST5

7. RST6

8. RST7

They allow the microprocessor to transfer program control from the main program to the subroutine program. After completing the subroutine program, the program control returns back to the main program.

Vector Address = Interrupt Number * 8

So we can find simply vector address. For Example:

RST2:        vector address=2*8    = 16 = 0010H

RST1:        vector address=1*8    = 08 = 0008H

RST3:        vector address=3*8    = 24 = 0018H

Hardware Interrupt:  

 

An external device initiates the hardware interrupts and placing an appropriate signal at the interrupt pin of the processor. If the interrupt is accepted then the processor executes an interrupt service routine.

1. TRAP

2. RST7.5

3. RST6.5

4. RST5.5

5. INTR

 

INTA is not an interrupt. INTA is used by the Microprocessor for sending the acknowledgement. TRAP has highest priority and RST7.5 has second highest priority and so on. 

TRAP: It is non maskable edge and level triggered interrupt. TRAP has the highest priority and vectors interrupt. Edge and level triggered means that the TRAP must go high and remain high until it is acknowledged. In case of sudden power failure, it executes an ISR and sends the data from main memory to backup memory.TRAP cannot be masked but it can be delayed using HOLD signal. This interrupt transfers the microprocessor's control to location 0024H.
TRAP interrupts can only be masked by resetting the microprocessor. There is no other way to mask it.

RST7.5: It has the second highest priority. It is maskable and edge level triggered interrupt. The vector address of this interrupt is 003CH. Edge sensitive means input goes high and no need to maintain high state until it is recognized. 
It can also be reset or masked by resetting microprocessor. It can also be resetted by DI instruction.

RST6.5 and RST5.5: These are level triggered and maskable interrupts. RST 6.5 has third highest priority and RST 5.5 has fourth highest priority.
It can be masked by giving DI and SIM instructions or by resetting microprocessor.

INTR: It is level triggered and maskable interrupt. It has the lowest priority. It can be disabled by resetting the microprocessor or by DI and SIM instruction.